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Web News: VIA start shipping integrated KM266
Posted by OCLOCKER on January 17, 2002
This from digitimes.com
Facing increasing competition from Silicon Integrated Systems (SiS), VIA Technologies launched its latest Advanced Micro Devices (AMD) Athlon-based integrated chipset KM266 on January 16, earlier than scheduled, hoping to consolidate its leading position in the AMD chipset market.
The new KM266 is based on the DDR SDRAM architecture and incorporates the S3 Graphics ProSavage8 core. With the ATA-133 interface in the chipset’s south bridge, the overall transmission speed between chipset and hard drive can be increased by 33%.
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XP 2500+ to have .13 micron core
With bigger cache on die
By Mike Magee, 17/01/2002 10:59:09 BST
RELIABLE SOURCES close to the AMD action tell the INQUIRER that the XP 2500+ will use a .13 micron core but that the 2200+ will use .18 micron technology.
The 2200 is slated to appear this quarter, and it will support the usual cluster of multimedia instructions including MMX, 3DNow and SEE.
Other details are that it will run at 1800MHz, using a 133 x 13.5 multiplier, have a 64-bit dual pumped bus, operate at 1.75 volts, and have 64K data two way as well as 64K instructions, also two way.
There will be 256K on die unified level two cache, which will be 16 way exclusive, and the die size will be 128 square millimetres, with the thing having 37.5 million transistors.
There is no reason for AMD to move straight to 2GHz - we say GHz rather than using AMD's PR rating scheme here - because the firm will be able to introduce intermediate speed steps, much like Intel has, and intro the 2100+, the 2200+, the 2300+ and the 2400+ before moving to the 2500+.
The XP-2500 using Thoroughbred will indeed launch in Q2 of this year but it seems the amount of on die level two cache is not decided - meaning it's likely to be higher.
It will have a 80 millimetre square die and use the .13 micron process that is currently sampling.
While there will be a slight decrease in raw megahurts when AMD moves from .18 micron to .13 micron, performance is expected to jump substantially, according to our reliable source, becauseof additional gates and a better design. µ
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